Vighnesh Iyer
Github, LinkedIn

An Overview of Hardware Design Languages

Implementation: eDSL

primitives: notion of time: execution semantics: underlying simulation algorithm:

Generic Event-Driven

These languages support somewhat arbitrary descriptions of event-driven components - the only common primitive construct is some notion of time.

Arguably, these two below aren't as general in their modeling approach as the ones above.

RTL Abstraction

These languages deal in the realm of explicit state and logic, both for the data and control path, governed by a clock.

Deep Embedding of HW Primitives

These are embeddings of hardware primitives (boolean logic, arithmetic, registers, memories) in a general-purpose programming language as a DSL. Execution of the hardware generator in the host language constructs an in-memory representation of a circuit, which can be serialized to a hardware IR, or emitted directly as Verilog.

Custom Compiler

Custom Language

Above RTL But Below Full-Blown HLS


Intermediate Representations

These can represent circuits at one or more of the above levels of abstraction